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3d168c28f6
This ensures the code-gen for these ABIs does not change silently. Co-authored-by: Folkert <folkert@folkertdev.nl>
103 lines
2.7 KiB
Rust
103 lines
2.7 KiB
Rust
//@ revisions: hard soft
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//@ assembly-output: emit-asm
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//@ [hard] compile-flags: --target thumbv8m.main-none-eabihf --crate-type lib -Copt-level=1
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//@ [soft] compile-flags: --target thumbv8m.main-none-eabi --crate-type lib -Copt-level=1
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//@ [hard] needs-llvm-components: arm
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//@ [soft] needs-llvm-components: arm
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#![crate_type = "lib"]
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#![feature(abi_c_cmse_nonsecure_call, cmse_nonsecure_entry, no_core, lang_items)]
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#![no_core]
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#[lang = "sized"]
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pub trait Sized {}
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#[lang = "copy"]
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pub trait Copy {}
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// CHECK-LABEL: __acle_se_entry_point:
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// CHECK-NEXT: entry_point:
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//
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// Write return argument (two registers since 64bit integer)
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// CHECK: movs r0, #0
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// CHECK: movs r1, #0
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//
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// If we are using hard-float:
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// * Check if the float registers were touched (bit 3 in CONTROL)
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// hard: mrs [[REG:r[0-9]+]], control
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// hard: tst.w [[REG]], #8
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// hard: beq [[LABEL:[\.a-zA-Z0-9_]+]]
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//
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// * If touched clear all float registers (d0..=d7)
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// hard: vmov d0,
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// hard: vmov d1,
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// hard: vmov d2,
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// hard: vmov d3,
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// hard: vmov d4,
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// hard: vmov d5,
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// hard: vmov d6,
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// hard: vmov d7,
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//
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// * If touched clear FPU status register
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// hard: vmrs [[REG:r[0-9]+]], fpscr
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// hard: bic [[REG]], [[REG]], #159
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// hard: bic [[REG]], [[REG]], #4026531840
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// hard: vmsr fpscr, [[REG]]
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// hard: [[LABEL]]:
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//
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// Clear all other registers that might have been used
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// CHECK: mov r2,
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// CHECK: mov r3,
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// CHECK: mov r12,
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//
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// Clear the flags
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// CHECK: msr apsr_nzcvq,
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//
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// Branch back to non-secure side
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// CHECK: bxns lr
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#[no_mangle]
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pub extern "C-cmse-nonsecure-entry" fn entry_point() -> i64 {
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0
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}
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// NOTE for future codegen changes:
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// The specific register assignment is not important, however:
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// * all registers must be cleared before `blxns` is executed
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// (either by writing arguments or any other value)
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// * the lowest bit on the address of the callee must be cleared
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// * the flags need to be overwritten
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// * `blxns` needs to be called with the callee address
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// (with the lowest bit cleared)
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//
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// CHECK-LABEL: call_nonsecure
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// Save callee pointer
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// CHECK: mov r12, r0
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//
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// All arguments are written to (writes r0..=r3)
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// CHECK: movs r0, #0
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// CHECK: movs r1, #1
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// CHECK: movs r2, #2
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// CHECK: movs r3, #3
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//
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// Lowest bit gets cleared on callee address
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// CHECK: bic r12, r12, #1
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//
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// Ununsed registers get cleared (r4..=r11)
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// CHECK: mov r4,
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// CHECK: mov r5,
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// CHECK: mov r6,
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// CHECK: mov r7,
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// CHECK: mov r8,
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// CHECK: mov r9,
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// CHECK: mov r10,
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// CHECK: mov r11,
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//
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// Flags get cleared
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// CHECK: msr apsr_nzcvq,
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//
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// Call to non-secure
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// CHECK: blxns r12
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#[no_mangle]
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pub fn call_nonsecure(
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f: unsafe extern "C-cmse-nonsecure-call" fn(u32, u32, u32, u32) -> u64,
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) -> u64 {
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unsafe { f(0, 1, 2, 3) }
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}
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